The general structures and manufacturing processes for electronic packages are described in, for example, Donald P. Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaging, McGraw-Hill Book Company, New York, New York, (1988), and Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, New York (1988), both of which are hereby incorporated herein by reference.
As described by Seraphim et al., and Tummala et al., an electronic circuit contains many individual electronic circuit components, e.g., thousands or even millions of individual resistors, capacitors, inductors, diodes, and transistors. These individual circuit components are interconnected to form the circuits, and the individual circuits are further interconnected to form functional units. Power and signal distribution are done through these interconnections. The individual functional units require mechanical support and structural protection. The electrical circuits require electrical energy to function, and the removal of thermal energy to remain functional. Microelectronic packages, such as, chips, modules, circuit cards, circuit boards, and combinations thereof, are used to protect, house, cool, and interconnect circuit components and circuits.
Within a single integrated circuit, circuit component to circuit component and circuit to circuit interconnection, heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip is referred to as the "zeroth" level of packaging, while the chip enclosed within its module is referred to as the first level of packaging.
There is at least one further level of packaging. The second level of packaging is the circuit card. A circuit card performs at least four functions. First, the circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. Second, the circuit card provides for signal interconnection with other circuit elements. Third, the second level package, i.e., the circuit card, provides a site for components that are not readily integrated into the first level package, i.e., the chip or module. These components include, e.g., capacitors, precision resistors, inductors, electromechanical switches, optical couplers, and the like. Fourth, the second level package provides for thermal management, i.e., heat dissipation.
Packages may be characterized by the material used as the dielectric, i.e., as ceramic packages or as polymeric packages. The basic process for polymer based composite package fabrication is described by George P. Schmitt, Bernd K. Appelt and Jeffrey T. Gotro, "Polymers and Polymer Based Composites for Electronic Applications" in Seraphim, Lasky, and Li, Principles of Electronic Packaging, pages 334-371, previously incorporated herein by reference, and by Donald P. Seraphim, Donald E. Barr, William T. Chen, George P. Schmitt, and Rao R. Tummala, "Printed Circuit Board Packaging" in Tummala and Rymaszewski, Microelectronics Packaging Handbook, pages 853-922, also previously incorporated herein by reference.
In the normal process for package fabrication a fibrous body, such as a non-woven mat or woven web, is impregnated with a resin. This step includes coating the fibrous body with, for example, an epoxy resin solution, evaporating the solvents associated with the resin, and partially curing the resin. The partially cured resin is called a B-stage resin. The body of fibrous material and B stage resin is called a prepreg. The prepreg, which is easily handled and stable, may be cut into sheets for subsequent processing.
Subsequent processing of polymeric substrates includes circuitization, that is, the formation of a Cu signal pattern or power pattern on the prepreg, or lamination of the prepreg to a power core. Circuitization may be additive or subtractive.
Subtractive circuitization is described, for example in Gerald W. Jones, Jane M. Shaw, and Donald E. Barr, Lithography In Electronic Circuit Packaging, in Chapter 12 of Seraphim et al., Principles of Electronic Packaging, pages 372-423. As described therein, copper is applied to the substrate. This copper generally has a thickness of at least about 1.4 mils (one ounce per square foot). Thereafter a resist is placed on the copper coated printed circuit board substrate to define the printed circuit on circuitization. After, e.g., exposure and development, the resist covers the copper in areas that are to become circuit traces, and leaves the rest of the copper exposed.
The board, with patterned resist atop the copper, is passed through an etching chamber containing copper etchants. These etchants convert the copper to water soluble copper compounds and complexes which are removed by spray action.
The copper that was underneath the resist is only minimally attacked by the etchants, with some undercut. After etching the resist is stripped, that is, chemically debonded and mechanically removed, leaving behind copper in the form of the desired circuit traces.
The composite printed circuit package is fabricated by interleaving cores (including signal cores, signal/signal cores, power cores, power/power cores, and signal/power cores) with additional sheets of prepreg, and surface circuitization. Holes, as vias and through holes, may be drilled in individual core structures, for example, before or after circuitization, as described above, or in partially laminated modules.
Composite circuit structures, that is, multi-layer packages, are panel plated to cover the surface and through hole interconnections with copper. These composite structures are subsequently subtractively circuitized using lithographic etching processes described above. In this case, the surface copper thickness is typically 50 microns or greater.
One problem that has been observed with the above described "full panel plating" and "subtractive etching" process is the uniformity of line width of the circuit leads. It must be emphasized that linewidth nonuniformity causes impedance nonuniformity, result in deleterious electromagnetic effects between lines on the same layer as well as between layers, "stubs", and reflections. These all reduce signal integrity.
In the full panel plating--subtractive etching process, line width uniformity goes down with increasing panel size. This is true with both large single unit panels and still larger multi-unit panels. The large multi-unit panels are fabricated and circuitized as a single panel, and then broken up into multiple units. The problem is most severe in high circuit density, high tolerance, narrow line packages.